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Open Access Research Article

Hybrid Modeling of Intra-DCT Coefficients for Real-Time Video Encoding

Jin Li*, Moncef Gabbouj and Jarmo Takala

Author Affiliations

Faculty of Computing and Electrical Engineering, Tampere University of Technology, 33720 Tampere, Finland

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EURASIP Journal on Image and Video Processing 2008, 2008:749172  doi:10.1155/2008/749172

The electronic version of this article is the complete one and can be found online at: http://jivp.eurasipjournals.com/content/2008/1/749172

Received:23 June 2008
Revisions received:25 September 2008
Accepted:2 December 2008
Published:25 February 2009

© 2008 The Author(s).

This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


The two-dimensional discrete cosine transform (2-D DCT) and its subsequent quantization are widely used in standard video encoders. However, since most DCT coefficients become zeros after quantization, a number of redundant computations are performed. This paper proposes a hybrid statistical model used to predict the zeroquantized DCT (ZQDCT) coefficients for intratransform and to achieve better real-time performance. First, each pixel block at the input of DCT is decomposed into a series of mean values and a residual block. Subsequently, a statistical model based on Gaussian distribution is used to predict the ZQDCT coefficients of the residual block. Then, a sufficient condition under which each quantized coefficient becomes zero is derived from the mean values. Finally, a hybrid model to speed up the DCT and quantization calculations is proposed. Experimental results show that the proposed model can reduce more redundant computations and achieve better real-time performance than the reference in the literature at the cost of negligible video quality degradation. Experiments also show that the proposed model significantly reduces multiplications for DCT and quantization. This is particularly suitable for processors in portable devices where multiplications consume more power than additions. Computational reduction implies longer battery lifetime and energy economy.

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